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Abstract. Green building education prioritizes workforce development to promote high-performing and net zero building adoptions. However, the concept and principles of net zero and building energy have rarely been reflected in the curriculum and instruction of K-12 science education in the United States. This research investigates the design and development of simulation game development paired with a science curriculum to teach green building design and energy principles in rural middle schools. This paper presents our education game development aligned with the newly developed curriculum unit that will be distributed to science classrooms. Green Building Design Studio game was developed from the following research phases: (i) Game scenario design, (ii) Energy simulation module creation, (iii) ML-prediction model development, and (iv) Cost estimation module creation. In ML prediction, the XGBoost algorithm demonstrated reliable performance and accuracy. The game was tested in a 3-day science immersion summer camp with twenty-seven middle school students in Missouri. The research team observed that the game enabled students to iterate de sign changes and promptly see the updated results from the dashboard. This paper describes the game development framework, methods and tools for energy simulation, ML prediction, and game development, as well as the findings and challenges. 

Today's CMOS technologies allow larger circuit designs to fit on a single chip. However, this advantage comes at a high price of increased process-voltage-temperature (PVT) variations. FPGAs and their designs are no exceptions to such variations. In fact, the same bit file loaded into two different FPGAs of the same model can produce a significant difference in power and thermal characteristics due to variations that exist within the chip. Since it is increasingly difficult to control physical variations through manufacturing tasks, there is a need for practical ways to sense chip variations to provide a way for circuit designers to compensate or avoid its negative effects. One of the most critical aspects of such variation is power. Therefore, we developed and demonstrated a high accuracy on-chip on-line Energy-per-Component (EPC) measurement technology on Xilinx FPGAs since 2011. However, we found that the hardware overhead associated with such method limited the use of the technology. Therefore, our follow-up work in Energy-per-Operation (EPO) on Spartan FPGA with OpenRISC SoC produced an equally accurate power monitoring technology with drastically lower hardware overhead. While this method made our technology more practical for SoC designs on FPGAs, it did not produce component level power dissipation data that previous EPC method provided. Therefore, we extend this prior work with a new algorithm to extract EPC values from EPO result. Despite the lower hardware overhead, this change ended up improving the accuracy of the power result by unraveling the instruction-level abstraction into component-level energy consumption.